Design Verification Engineer/대구

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기술스택

TCP/IP
ASIC
Verilog
Perl
FPGA
ethernet
Linux
Git
C

주요업무

We are seeking a skilled Design Verification Engineer with 5+ years of experience and strong expertise in UVM (Universal Verification Methodology) to lead verification efforts for complex SoC/IP blocks. The candidate will be responsible for developing and maintaining comprehensive verification environments, writing robust testbenches, and collaborating closely with design teams to ensure functional correctness of IPs such as HDMI, USB, PCIe, Ethernet, MIPI, Vx1, DP, eDP and others.

자격요건

Key Responsibility:
▪Develop and maintain UVM-based testbenches and verification environments for sub-block and top-level IPs.
▪Design and implement directed and constrained-random test cases, assertions, functional coverage models, and scoreboards.
▪Drive verification planning, including test plan creation, coverage-driven verification (CDV) strategies, and regression management.
▪Create and maintain automation scripts for regression runs and coverage analysis.
▪Lead system-level verification to ensure smooth IP integration.
▪Interface with cross-functional teams (LD, FW) for seamless integration and tape-out.
▪Utilize EDA tools such as Synopsys VCS, Cadence Incisive/Xcelium, and Mentor Questa for simulation, debug, and coverage tracking.
▪Develop, customize, and integrate Verification IPs (VIPs) to enhance test efficiency and verification quality.

Target IPs: 
▪High-Speed Interfaces: HDMI, USB, PCIe, Ethernet
▪Display and Camera Interfaces: MIPI, VX1, DisplayPort (DP)
▪Storage Interfaces: SD, eMMC, UHS-I/II, SDIO
▪Memory Interfaces: DDR (DDR3, DDR4, LPDDR4/5)

Qualifications:
▪Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
▪5+ years of hands-on experience in SoC/IP design verification using UVM
▪Solid understanding of digital design, SoC architecture, UVM, and design automation flows
▪Skilled in using Verification IPs (VIPs) from Synopsys and Cadence
▪Proficient in industry-standard EDA tools for simulation, analysis, and debugging
▪Experience with interface protocols such as AMBA (AXI, AHB, APB), VX1, DP, HDMI 2.x, USB 3.x, PCIe Gen3/4/5, Ethernet (1G/10G/100G), MIPI CSI/DSI, SD, eMMC, UHS-I/II, and SDIO
▪Proficient in scripting languages such as Python, Perl, or TCL for automation
▪Strong documentation skills for clear and effective test plans and reports
▪Excellent problem-solving skills and strong attention to detail
▪Good English communication skills (reading, writing, speaking) for global collaboration

Preferred Skills:
▪Familiarity with hardware-software co-verification and system-level validation.
▪Experience with Continuous Integration (CI) tools and test automation frameworks.

우대사항

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복지 및 혜택

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채용절차 및 기타 지원 유의사항

대구 북구 연암로 40 시청별관 202동 503호(산격동)